We are seeking an experienced Digital Design and Verification Engineer to work on developing advanced Power System Management products. The ideal candidate has 5+ years of SoC / ASIC experience defining, implementing, and verifying digital and mixed-signal designs. This is a Digital Design position focusing on mixed-signal SOC development.
Expertise in the following areas:
• RTL design in Verilog and/or SystemVerilog.
• Architecture specification including familiarity with microprocessor and SoC architectures.
• Validation of software and hardware products. Experience developing test plans and test benches, utilizing directed and constrained random techniques, preferably in a UVM environment.
• Advanced verification techniques such as coverage driven testing, assertions, and formal verification.
• Lab skills including emulation with combined FPGA and analog environments
In addition, the ideal candidate will also have experience with:
• Mixed-signal integration and verification involving DACs, ADCs, power supplies.
• Traditional and Object Oriented software development and debug in languages such as C, C++, C#, assembly, Perl, etc.
• Driving synthesis, APAR, timing analysis, and ATPG tools